High quality audio power amplifiers are traditionally large, heavy, and inefficient. Typically these equipments are capable of high power audio output with very low total harmonic distortion (THD). However, these equipments achieve only approximately 25% efficiency under normal audio operating conditions because they typically use inefficient linear or quasi-linear amplifiers (e.g. Class A, B, G, and H).
In recent years, the demand for more efficient audio power amplifiers has increased. Thus the shift from Class B to Class D amplifiers for sound reproduction.
Class D amplifiers provide high efficiency, but typically have limited bandwidths, resulting in high THD at high audio frequencies.
A Class D amplifier is basically a switch-mode power supply modified to operate in four quadrants at high frequencies (e.g. audio frequencies). A switch-mode power supply uses pulse-width modulation (PWM) to control the ON/OFF duty cycle of power switching transistor(s) that provide power to a load. The efficiency is high because the switches are not operated in their linear region.
FIG. 1 is an illustration of a simplified Class D topology. As illustrated, a comparator circuit (not shown) inside the Pulse-Width Modulator 110 compares the amplitude of incoming analog audio signal 101 to the amplitude of a reference triangular waveform operating at an intended switching frequency. The comparator circuit switches its output high or low by comparing the incoming audio's amplitude against the amplitude of the triangular waveform. When audio signal 101 is above the amplitude of the triangular waveform, the comparator switches output D+ of the PWM 110 to the ON state. Output D+ remains ON for the duration of time while the input audio signal exceeds the amplitude of the triangular waveform. Conversely, while the input audio signal is below the amplitude of the triangular waveform, the output D+ of the PWM is at the OFF state. Output D− is the inverse, i.e., complementary of output D+.
The relationship between the input audio amplitude and the pulse-width modulator outputs D+, and D− is linear to a first order. The outputs D+ and D− of the comparator drive “totem-poled” transistor switches Q1 and Q2. Each transistor switch is a MOSFET device, with a diode device 131 coupled across its terminals to enable four quadrant switching. The topology shown in FIG. 1 is an example embodiment of a class D amplifier where the same type MOSFETs is used for both switches. Alternate embodiments include using complementary transistors, e.g. one p-type and one n-type MOSFET. For this reason the MOSFET symbol used shows no polarity.
Output filter 140 is typically a second order low-pass, e.g., LC configuration filter. The output filter 140 is essential for low pass filtering, or integrating, the carrier's varying pulse width duty cycle for reproduction of the original audio content while attenuating the switching carrier frequency.
For high fidelity audio reproduction, the operating (i.e. switching) frequency of the Class D power amplifier must be significantly higher than the bandwidth of the audio being reproduced. Thus, to reproduce higher bandwidth audio with higher fidelity requires relatively high switching frequency. However, the higher the switching frequency, the more the switching losses (i.e. reduced efficiency). Thus, a prior art Class D system is limited in efficiency and output bandwidth because of the inherent efficiency loss.
As discussed above, in a Class D amplifier, the high frequency switching waveform is filtered with an LC filter, e.g., a second order LC filter. Selection of the filter component values is very important and essential to maximizing performance. For instance, the corner frequency of the LC filter is chosen between the audio bandwidth of interest and the switching frequency. As the corner frequency moves closer to the switching frequency, higher switching frequency ripple content appears at the output. And, as the corner frequency approaches the audio bandwidth of interest, distortion increases in the audio reproduction. Thus, the tradeoff in corner frequency is between higher frequency ripple, and low audio bandwidth, leading to high distortion in the reproduced audio signal.
Although the higher frequency ripple is generally inaudible to the human ear, its presence is still undesirable for several reasons: (1) it is an emissions problem, for instance, it appears as artifacts in the AM radio band and other places; (2) it influences audio measurements; (3) provides a limitation on how clean the output signal looks to the end user; and (4) puts unwanted artifacts on a feedback signal fed to the control circuit, limiting the performance.
Generally, the corner frequency of the output filter is chosen for high bandwidth and low THD thus the compromise is high frequency ripple on the output. This high frequency ripple is a market stigma for Class D amplifiers even though the ripple is outside the audio bandwidth. A detailed discussion of the ripple problem is discussed below.
FIGS. 2 and 3 present a more detailed illustration of the ripple problems associated with prior art half bridge class D amplifiers. FIG. 2 is an illustration of a typical half bridge class D amplifier configuration. The associated waveforms are shown in FIG. 3. As illustrated, the half bridge Class D amplifier configuration comprises essentially of switches Q1 and Q2, which are coupled to a modulator; inductor L1 coupled on one end to switching node 201; output capacitor C1, which is coupled to the second end of inductor L1 and across device RLOAD; and device RLOAD (i.e. representing the impedance of the loudspeaker) which is coupled to the second end of inductor L1 and in parallel with capacitor C1. Two power sources of equal voltage, VD, are needed for half bridge operation.
The LC filter (comprising essentially of inductor L1 and capacitor C1) is driven by a square wave at the switching frequency. A square wave voltage 310 is generated at the switching node 201 as a result of the modulator 110 driving the gates of transistors (MOSFETs) Q1 and Q2. Inductor L1 integrates square wave voltage 310 into a triangular wave current 320. And finally, the triangular wave current 320 is integrated into a quasi-sine wave voltage 330 by the output capacitor C1.
The ripple problem is clearly shown in waveform 330. In practice the voltage ripple on a full bandwidth class D amplifier can be on the order of one volt peak-to-peak (1 Vpp) with a fundamental of several hundred kHz, making it extremely prone to interfering with other electronic equipment, especially AM radio receivers. Modulation schemes in which the switching frequency is variable are particularly troublesome.
In order to reduce this ripple an LC series trap circuit is often used across C1. This approach has several disadvantages. First, the Q of the LC trap must be extremely high in order to effectively shunt current away from C1, whose impedance at the switching frequency is already well below an Ohm. Second, the trap is only effective at a single frequency. The higher the Q, the less effective the trap will be if the switching frequency is variable. The trap is also not very effective at attenuating harmonics of the switching frequency; although these are usually 20 dB down from the fundamental in relative terms, they can still present problems if their magnitude is too large in absolute terms.
Another standard method of reducing ripple would be to add another second order filter to the output, creating a fourth order filter. Some of the disadvantages of this method include that the inductor must be sized to handle the full output current, and the filter may add distortion due to nonlinearity in the devices used, and the filtered output is outside of the control of any feedback loop.
Another prior art method to handling the ripple problem is to add a second LC low-pass filter in the output thus effectively increasing the order of the output filter to four. However, fourth order filters pose controllability and linearity problems. In addition, the higher order filter increases the THD.
Class D amplifiers are often operated in a full bridge configuration to increase the output power without increasing the power supply voltages. Thus, for completeness, a full bridge conventional class D amplifier is shown in FIG. 4. The two inductors are shown as L1A and L1B, and these may be implemented as two discrete inductors or as a single coupled inductor so long as the dot-orientation is consistent. Inductor L1B is coupled to switching node 401 representing the output of MOSFET switches Q3 and Q4. The base of MOSFET switch Q3 is driven by signal D− from the output of the modulator and the base of MOSFET switch Q4 is driven by signal D+ from the output of the modulator. The output of the class D amplifier is shown with one side grounded, but this is not necessary for operation. The resulting waveforms are similar to that discussed above for the half bridge configuration.